Method for fabrication of electrical contacts to superconducting circuits

ABSTRACT

A method for electrically interconnecting two substrates, each having a corresponding set of preformed electrical contacts, the substrates comprising an electronic circuit, and the resulting module, is provided. A liquid curable adhesive is provided over the set of contacts of a first substrate, and the set of electrical contacts of the second substrate is aligned with the set of electrical contacts of the first substrate. The sets of electrical contacts of the first and second substrate are compressed to displace the liquid curable adhesive from the inter-contact region, and provide electrical communication between the respective sets of electrical contacts. The liquid curable adhesive is then cured to form a solid matrix which maintains a relative compression between the respective sets of electrical contacts. One embodiment of the module comprises a high-speed superconducting circuit which operates at cryogenic temperatures.

RELATED APPLICATIONS

The present application claims benefit of priority from U.S. ProvisionalPatent Application No. 60/840,379, filed Aug. 25, 2006, the entirety ofwhich is expressly incorporated herein by reference.

STATEMENT OF GOVERNMENT RIGHTS

The invention was produced under U.S. Army CERDEC SBIR ContractW15P7T-04-C-K605, and the government has certain rights herein. Theinvention described herein may be manufactured, used, imported, sold,and licensed by or for the Government of the United States of Americawithout the payment of any royalty thereon or therefor.

FIELD OF THE INVENTION

The present invention relates to the field of multichip modules, andmethods for production thereof.

BACKGROUND OF THE INVENTION

Multichip modules provide a plurality of functional wafers which aresupported and interconnected on a single substrate, and thereafter themodule may be connected to other components as an integral unit.

As compared to integrated circuits, the multichip module providesopportunity for use of various incompatible technologies (i.e., thosethat cannot be fabricated together) within a single system component,and the use of relatively simpler components and lower spatial densitythan required within an integrated circuit to obtain the samefunctionality. However, by eliminating separate packaging for thecomponents, certain costs can be reduced, density increased, andperformance increased with respect to discrete packaged or wire-bondedcomponents on a circuit board.

In normal semiconductor technology circuits, operation leads tosignificant heat dissipation, and when such components are supported ina multichip module, potentially significant amounts of heat must beremoved through the module substrate and packaging. Therefore, theinterface between the functional wafer and substrate for such modulesshould have a low thermal impedance (high thermal conductivity). Forexample, a low melting temperature alloy may be used to bothelectrically and mechanically bond the wafer to the substrate through aset of “solder bumps”. This process typically requires heating thesubstrate and wafer above the reflow temperature of the solder, and thusmay damage certain temperature-sensitive electronics. Because of thermalcycling issues, the wafer and substrate should have matching thermalcoefficients of expansion. Typically, there is no filler materialbetween the wafer and substrate prior to reflow, since this could impairthe reflow process or cause other problems. A filler may be added in thespace between the wafer and substrate after reflow, for example toenhance thermal conductivity.

Superconducting circuits based on Rapid-Single-Flux-Quantum logic arethe fastest in any electronic technology, with clock speeds in excess of20 GHz routinely achieved, and speeds in excess of 100 GHz projected asthe devices are scaled to smaller sizes. In the preferred embodiment ofthese integrated circuits, they are composed of thousands of Josephsonjunctions, each constructed from two layers of superconducting niobiumwith an intervening oxide layer about 1 nanometer thick. To functionproperly, these circuits must be cooled to cryogenic temperatures belowthe critical temperature of 9 K (−264 C). Further, the very thin oxidelayer of the circuits can be damaged by temperatures in excess of about+200 C, so elevated temperatures in fabrication and processing must beavoided. This is a low-power, low-voltage, low-impedance technology,based on the propagation of voltage pulses less than 1 mV high and 1picosecond wide, with device resistances of a few ohms. As thetechnology has developed, it has become necessary to develop multi-chipmodules (MCM), where these fast voltage pulses pass betweensuperconducting chips on a superconducting carrier. To be practical,such an MCM must be both robust and reliable for all high-speed links inthe package.

Superconducting circuits as currently implemented typically have a lowerfunctional density than their more evolved silicon semiconductorcounterparts, and therefore achieving complex functionality may requiremultiple wafers. Superconducting circuits dissipate small amounts ofpower, and therefore the function of the substrate is principally toprovide mechanical support and electrical pathways, and far less toprovide effective dissipation of operating power. During cooldown tocryogenic temperatures, the MCM is typically mounted in a vacuum, andtherefore the thermal path for cooling is generally through thesupporting substrate.

A standard technique for superconducting MCMs has been developed in theprior art, based on indium-tin solder reflow. The In—Sn alloy was chosensince it melts at a very low temperature, less than 200 C. First, asuperconducting chip with gold contacts is dipped in a bath of moltensolder, and In—Sn droplets attach to the gold contacts and cool to formsolid bumps. The chip is then carefully aligned so that these solderbumps are directly above corresponding gold contacts in the chipcarrier. Then, the assembly is carefully heated to remelt the solderbumps, which then flow to wet the gold contacts on the carrier (“solderreflow”). The assembly is then clamped and cooled down to roomtemperature. The resulting MCM is then mounted in a cryogenic packageand cooled to below 9 K for high-speed testing. Devices made in this wayhave demonstrated transmission of high-speed pulses up to about 100 GHz.K. E. Yokoyama, G. Akerling, A. D. Smith, and M. Wire, “RobustSuperconducting Die Attach Process”, IEEE Trans. Applied Supercond.,VOL. 7, NO. 2 (June 1997), pp. 2631-2634, describes In—Sn reflow (<140C)solder bonds for superconducting MCMs using flip chip technology, i.e.,a controlled collapse micro-solder reflow technique. See also, U.S. Pat.No. 5,920,464, (Reworkable microelectronic multi-chip module, Yokoyama);6,032,852 (Reworkable microelectronic multi-chip module, Yokoyama),6,050,476 (Reworkable microelectronic multi-chip module, Yokoyama),6,216,941 (Method for forming high frequency connections to hightemperature superconducting circuits, Yokoyama), each of which isexpressly incorporated herein by reference. However, the existingtechniques for die attachment for superconducting MCMs, includingYokoyama et al., are not adequate for the demanding ambient conditionsthese systems must endure. For example, modules constructed using thereflow technique according to Yokoyama et al. tend to fail undervibration, and especially ultrasonic vibration. The reliability of thebond achieved by the In—Sn solder-reflow method is very weak, with pooradhesion, and the contacts break easily with thermal cycling andhandling. Furthermore, the necessary wetting during the reflow processbecomes less reliable as the contact area decreases, particularly forsizes of 50 microns or less. This is unacceptable for packaging of chipswith many small contacts.

When using superconducting electronics, the ability to support high datarate communications, both within a wafer, and between wafers, iscritical. For example, a target specification is to provide clock anddata links between receiver front ends and subsequent digital signalprocessing circuits at rates above 40 Gbps. Such systems findapplication in high bandwidth communications systems and processingcircuits, which may require location in the field using a cryocooler,where environmental stresses are apparent. Thus, an improved multichipmodule fabrication technique with improved vibrational tolerance isdesired.

Differential thermal expansion is well known to create problems instressing glued connections. See, Hsieh (U.S. Pat. No. 6,605,491),expressly incorporated herein by reference, which discusses bonding asilicon chip to a polymeric substrate, and in particular thermal stressissues over a range of −55 C and +125 C, using adhesives generallyhaving a high viscosity. Such thermal stress can cause bowing inflexible substrates, and flaking or cracking of the adhesive in rigidsubstrates. See also, U.S. Pat. No. 6,919,642. These problems would bemuch worse for temperature variations from above room temperature tonear absolute zero, a range of over 300K. It is also well known thatmany materials (especially most polymers) become weak and brittle atcryogenic temperatures.

U.S. App. 20040214377 and EP 1,473,769 entitled “Low thermal expansionadhesives and encapsulants for cryogenic and high power densityelectronic and photonic device assembly and packaging”, expresslyincorporated herein by reference, adhesives, with a high viscosity, forbonding electronic device in which small particles with a negativecoefficient of thermal expansion (CTE) are added to produce a filledadhesive with small net CTE to match the wafers to be bonded, in orderto prevent delamination due to stress at cryogenic temperatures.

SUMMARY OF THE INVENTION

The present invention provides a multichip module, and method offabrication thereof, wherein a non-conductive adhesive is employed tofasten wafers to the substrate and maintain alignment betweencompression bonded contacts. While solder-type materials may be used asthe contact material, reflow is not required, thus enhancing reworkability. Other contact materials may also be used, for example goldstuds.

Kaplan, S. B. Dotsenko, V. Tolpygo, D., “High-Speed Experimental Resultsfor an Adhesive-Bonded Superconducting Multi-Chip Module”, IEEETransactions on Applied Superconductivity, June 2007 (vol. 17 (2), Part1, pages: 971-974), expressly incorporated herein by reference.

According to one aspect of the invention, the chip and substrate for asuperconducting multichip module have matched CTEs, e.g., both aresilicon wafers, so a thin layer of epoxy is able to effectively bondthem, without bowing or delaminating, for example, over a broad range oftemperatures, despite a CTE mismatch of the adhesive material itself,particularly if the adhesive is was specially chosen to maintain itsstrength at cryogenic temperatures. The preferred non-conductiveadhesive is an epoxy that has suitable mechanical characteristics atcryogenic temperatures, to reliably bond the wafer to the substrate,when subject to normal operating conditions, which may includecryocooler vibrations, environmental vibrations (e.g., from cryocooleroperation, mobile platforms), shocks, thermal cycling (room temperatureto cryogenic temperatures) and the like.

The preferred adhesive generally has a low filler concentration, andtypically has a coefficient of thermal expansion which does not matchthat of the wafer or substrate, which themselves typically have matchingcoefficients, and may be formed of the same material. The preferredadhesive has a relatively low viscosity, and during the multichip moduleformation process, forms a thin layer between the wafer and substrate.For example, it is preferred that the layer be less than about 100microns thick. For thin layers, the mismatch of the coefficient ofthermal expansion are generally tolerated without bond failure, whilethicker layers may be subject to increased stresses and may be moresubject to failure. The preferred adhesive layer thickness is betweenabout 10 microns and 70 microns, representing, at the lower extreme, theaverage height of InSn solder bumps, and at the upper extreme, theheight of gold stud contacts.

The uncured adhesive preferably has a low viscosity, e.g., less thanabout 10,000 cp, preferably less than about 1,000 cp, and morepreferably less than about 500 cp, which allows the adhesive to bereadily distributed over the bonding area without voids, while beingreadily squeezed from the intercontact space and not substantiallyredistributing forces at the respective contacts due to compression ofthe wafer and substrate during curing, which are intended to beplastically deformed during the process by the application of thepressure. The plastic deformation ensures a relatively high contactarea, and permits accommodation for variations in the height of thevarious contacts, which extend above the surface and are generallyplaced on the devices during a plating or dipping process, and thereforeare subject to statistical variations.

It has been found that a compression cycle between the wafer andsubstrate in the presence of uncured adhesive leads to a functionalmodule which is tolerant of environmental vibration at room temperatureand cryogenic temperatures, yet may under some conditions beintentionally separated and rebonded.

For example, it may be desirable to rework modules in which the activeelectronics fail, or cannot be fully tested before assembly into amodule. This therefore allows an increase in yield.

Certain epoxy bonds may be weakened, for example, by a chemical reactionor solvent which then allows mechanical force to separate the wafer fromthe substrate, for example, by applying a shear force, or a tensileforce. Thus, the adhesive may be selected to be susceptible todegradation to provide a reworkable bond, or resistant to degradation toprovide a permanent bond.

This technique has been successfully tested in the fabrication ofmodules that utilize either In—Sn solder or gold-stud bonds forelectrical contact between chip and carrier.

It is noted that, since it is not necessary to raise the temperature ofthe module to reflow temperatures, heat sensitive electronics may beused, and multiple layers of wafers may be provided to increase packagedensity and decrease average lead distance without risk that relativelylater processing steps will disturb earlier formed structures. See, U.S.Pat. No. 6,829,237 (Carson et al.), expressly incorporated herein byreference, which discloses a high speed multi-stage switching networkformed from stacked switching layers, possibly including superconductingswitch networks on stacked chips.

The technique is not necessarily limited to superconducting circuits,nor is the adhesive limited to epoxy materials. Therefore, a moregeneral application is contemplated. For example, the technique may beused to form MCM's using conventional semiconductors which maycryocooled. Likewise, various reactive or UV or light curable adhesivesmay be employed, including various epoxies, peroxide, silane/siloxane,or isocyanate adhesives. The cure may be initiated by heat, light orother energy, moisture, or catalyst exposure, for example.

Adhesives provide additional advantages over the soldered contactswithin MCM's for the cryogenic case. On removing an MCM from thecryogenic vacuum environment, it is likely (unless special precautionsare taken) that water vapor from the air will condense onto the chip.For a soldered MCM, this can lead to corrosion of the contacts anddegradation of the solder bonds. In contrast, if the MCM, and especiallythe interconnecting electrical contacts are hermetically sealed withepoxy, no such entrance of water can take place. While an epoxy overcoatmay be used in a reflow bonded MCM, the present technology makes thereflow process unnecessary, and thus permits use of temperaturesensitive circuits, and allows use of contract materials which arenon-eutectic.

While the epoxy bond is being formed, the metallic bumps are preferablydeformed with applied pressure. This helps assure electrical contact ifthe bumps are non-uniform, and generally provides an increase in contactsurface area. As the epoxy cures, it preferably shrinks, maintaining thecontacts under compressive strain. As the epoxy is cooled to cryogenictemperatures, it shrinks a bit further (more than the substrate ormetallic bump), making the electrical contacts even more secure.Therefore, a preferred adhesive has a small but defined amount ofshrinkage upon curing, and has a larger positive coefficient of thermalexpansion than the chip and substrate materials, which are, for example,silicon wafers. Preferably, the chip and substrate have the samecoefficient of thermal expansion, thus avoiding mismatch and shearforces within or across the adhesive boundary.

It is therefore an object to provide a method for electricallyinterconnecting two substrates, each having a corresponding set ofpreformed electrical contacts, comprising providing a liquid curableadhesive over the set of contacts of a first substrate; aligning the setof electrical contacts of the second substrate with the set ofelectrical contacts of the first substrate; compressing the sets ofelectrical contacts of the first and second substrate to displace theliquid curable adhesive and provide electrical communication between therespective sets of electrical contacts; and curing the liquid curableadhesive to form a solid matrix which maintains a relative compressionbetween the respective sets of electrical contacts. Electricalconductivity between the respective sets of electrical contacts ispreferably maintained over at least a range of temperatures betweenabout +50C to −175C.

It is a further object to provide a method for forming a multichipmodule having at least two electrically interconnected substrates, atleast one of the substrates having a deformable metal in a contactregion, comprising providing a liquid curable adhesive over the set ofcontacts of at least a first of the substrates; aligning respective setsof electrical contacts of the first and a second substrate; compressingthe sets of electrical contacts of the first and second substrate todeform the deformable metal and exclude liquid curable adhesive from theintercontact zone; and curing the liquid curable adhesive to form asolid matrix while generating a prestress to maintain a compressiveforce between the respective sets of electrical contacts. The curedadhesive preferably maintains mutual compression and electricalconductivity between the corresponding sets of predefined electricalcontacts over at least a range of temperatures between about +50C to−175C. A superconducting device on at least one of the electricallyinterconnected substrates may then be operated at cryogenictemperatures, with high speed, narrow pulse signals reliablycommunicated to the other substrate.

It is a still further object to provide a module having electricalinterconnections along predefined paths between at least two substrates,comprising first and second substrates, each having corresponding setsof predefined electrical contacts; and a cured adhesive surrounding thesets of predefined electrical contacts, generating a compressive forcebetween the first and second substrates, wherein the corresponding setsof predefined electrical contacts are not thermally welded together, andare maintained in relative compression by the cured adhesive surroundingthe sets of predefined electrical contacts.

Preferably, the coefficients of thermal expansion of the first andsecond substrates are matched, and less than the coefficient of thermalexpansion of the cured adhesive, to ensure that when cooled, thecontacts do not separate.

The liquid curable adhesive may comprise an epoxy adhesive, preferablybeing substantially unfilled, and preferably having a viscosity at 20Cof less than about 1000 cp. The adhesive preferably maintains itsmechanical integrity down to cryogenic temperatures, and preferably hasa positive coefficient of thermal expansion, such that if it is cured atelevated temperatures, a compressive prestress is generated aftercooling. The coefficient of thermal expansion of the adhesive ispreferably greater than that of the substrate, for similar reasons.Likewise, the adhesive preferably has a degree of shrinkage duringcuring, which will also generate a compressive prestress. The adhesivemay be cured, for example, at a temperature of between about 40C and100C.

The compressing preferably imposes a pressure of between about 5-100 gmper contact pair. The compression preferably plastically deforms a metalon each of the set of contacts of at least one of the first and secondsubstrate, and for example may deform metal provided on each of thecorresponding contacts. The set of contacts may include at least 20contacts, and for example, may have 20, 40, 80 or more contacts, inaddition to a set of ground contacts which are useful in Josephsonjunction-containing integrated circuits, and the process for forming themodule is designed to ensure that each of the contacts of the respectivesets forms a conductive path between the first and second substrate.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1A shows an exemplary substrate wafer in accordance with thepresent invention, showing the pads for connection to the chip insidethe bonding pads for external connection;

FIG. 1B shows an exemplary chip to be bonded to the wafer of FIG. 1A,showing the pads for connection to the substrate wafer;

FIGS. 2A1, 2A2, and 2A3 show, a top view of an exemplary contact patternof a wafer chip, a side view of the wafer chip and a carrier in positionfor attachment, and a side view of the bonded wafer chip and carrier,respectively;

FIG. 2B shows the carrier contacts immersed in liquid adhesive beforebonding to the wafer;

FIG. 2C shows the bonded result, in which the wafer and carrier contactsare compressed to achieve electrical continuity, surrounded bysolidified adhesive; and

FIG. 3 shows an exemplary multichip module which may be implementedaccording to the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Comparative Example

Single-chip modules (SCMs) consisting of 5-mm×5-mm chips bonded to1-cm×1-cm silicon carriers with Sn—In eutectic solder, using awell-practiced solder-reflow die-attach method. K. E. Yokoyama, G.Akerling, A. D. Smith, and M. Wire, “Robust superconducting die attachprocess,” IEEE Trans. Appl. Supercond., vol. 7, pp. 2631-2634 (June1997) (“Yokoyama”). Very impressive high-speed data were obtained withthese samples. After several thermal cycles, the contact pads werecleaned of an SCM carrier by immersing it in acetone and placing it inan ultrasonic bath. The chip immediately detached from its carrier.Solder was still attached on both the chip and carrier pads. Likewise,using an ultrasonic probe to excite sound waves in another carrier leadto similar results: the chip detached. Therefore, while reflow solderingtechniques for fabricating MCM's generally yield acceptable electricalperformance, their mechanical performance is inferior.

The 5 mm² test chip fabricated with HYPRES' (Elmsford, N.Y.) 1-kA/cm²process (D. Yohannes, S. Sarwana, S. K. Tolpygo, A. Sahu, Y. A.Polyakov, and V. K. Semenov, “Characterization of HYPRES' 4.5 kA/cm² & 8kA/cm²Nb/AlOx/Nb fabrication processes,” IEEE Trans. Appl. Supercond.,vol. 15, pp. 90-93, June 2005.) and having InSn bumps formed by dippingthe chip in a molten solder bath, was placed over, and aligned withcorresponding contacts on a 1 cm² carrier, and the aligned structedheated to a reflow temperature. Each transmitter launches a pulse trainonto a 1.6-ΩPTL (passive transmission line), off chip through a bump,back on chip through another bump.

Example

Experimental results for chip-to-chip data communications on asuperconducting Multi-Chip-Module (MCM) using a novel fabricationtechnique are provided. The MCM was produced using a non-conductiveadhesive to bond a 5-mm×5-mm test chip to a 1-cm×1-cm carrier. Themodule demonstrated superior mechanical stability and protection fromits environment during thermal cycling. The MCM also retained itselectrical properties after multiple thermal cycling from roomtemperature to 4 K. The superconducting circuitry successfully passedsingle-flux quanta at rates exceeding 50 Gbps, with error rates lowerthan 5×10⁻¹⁴ at 36 Gbps using 100-micrometer diameter In—Sn solderbumps, and lower than 6×10⁻¹⁴ at 57 Gbps using 30-micrometer-diametersolder bumps. Although this was demonstrated with a single chip, passingthe signal off the chip to the carrier and back again is equivalent tocommunication between two chips on a larger carrier. The extension tomore than two chips is also evident.

One embodiment of the invention is intended to improve system assemblytime and yield by culling known good die and permanently bonding them tothe carrier. Accordingly, chips must first be tested on a test carrier,chips must be demounted from the test carrier and remounted on the MCMsystem carrier, and the adhesive used for initial chip testing mustprovide a strong bond while enabling rework.

The solder bumps were produced by dunking a carrier into a bath ofliquid solder. K. E. Yokoyama, G. Akerling, A. D. Smith, and M. Wire,“Robust superconducting die attach process,” IEEE Trans. Appl.Supercond., vol. 7, pp. 2631-2634, June 1997. Other techniques may beused, and thus it is not necessary to raise the chip to reflowtemperatures in all embodiments. The chips were then aligned and bondedto the substrate using a Karl Suss model 150 chip bonder. A drop ofadhesive was applied to the substrate just before assembly, and thus thedrop remained uncured during compression of the contacts. The bumpseasily pushed through the adhesive to make excellent electrical contact.After curing, epoxy shrinkage resulted in reliable electrical connectionand mechanical stability. Many kinds of bumps can be used with thistechnique, including solder, gold studs, and polymers.

Solder bump heights were measured with a Veeco model NT1100profilometer. Several fluxes were tried, but the technique frequentlyyielded bump height variations of as much as 50% for 5 μm high bumps,thereby reducing yield. Modules produced with gold stud bumps providedby Palomar Technologies produced superior bump uniformity (±1 μm 1σ),and excellent electrical contact.

The adhesive may be a temporary or permanent type. Permanent typeadhesives could not be disassembled even after weeks of soaking insolvents and hours of immersion in an ultrasonic bath, while temporaryadhesive bonds were readily severed using an ultrasonic bath or probe.

Thermal cycling experiments were conducted for these modules in whichthe SCM was cycled between 4K and room temperature more than 10 timeswithout any mechanical or electrical failure. These experiments weredeliberately carried out on under harsh conditions, in which the SCM wassubject to moisture condensation and quick changes in temperature.

The re-workable adhesive method does not result in perfect yieldssubsequent to the first bonding, due to difficulty in removing adhesiveresidues. Some chips could, however, be re-bonded.

A preferred permanent non-conductive adhesive is Tra-Bond 2115, whichhas a relatively low viscosity of 250 cp. Tra-Bond 2151, with aviscosity of 40,000 cp, on the other hand, was too viscous, and it wasdifficult to squeeze out the adhesive sufficiently to get goodelectrical contact. The 2115 lacks filler, whereas the 2151 has addedalumina and silica filler, which increases the viscosity and also thethermal conductivity. The process requires that a pressure be appliedbetween the wafer and substrate to displace liquid adhesive from thecontact region, to provide metal-to-metal contact, and further that thecontacts be deformed to provide a large contact area per contact, and toensure that statistical variations in contact height do not result inopen circuits. However, the amount of pressure that may be applied islimited by the fragility of the wafer and substrate, with too high apressure potentially leading to fracture. Too little pressure would leadto open circuits. It is noted that the adhesive itself redistributesforces, in a manner somewhat related to the viscosity of the uncuredadhesive. A higher viscosity or highly filled liquid will tend to have agreater force redistribution, and therefore a highly viscous liquid mayprevent reliable electrical connections from being formed. Likewise,higher viscosity adhesives may persist in the region between therespective contact pairs, leading to formation of an insulating filmbetween them and an open circuit or high impedance path. Depending onthe filler composition and characteristics, filler particles may alsopresent a barrier to prevent good contact. Therefore, according to oneembodiment of the invention, the adhesive has a relatively low fillerconcentration and is substantially formed of polymeric substances.

As the preferred adhesives cure, small amount of shrinkage occurs. Ifthe adhesive has a larger positive coefficient of thermal expansion thanthe wafer and substrate materials, then if the structures are heatedduring curing, and/or operated at reduced temperatures, a prestress willbe imparted to the adhesive. Each of these advantageously increases theforce placed between the respective pairs of electrical contacts, andtherefore tend to maintain good electrical contact.

In order to accelerate curing of the epoxy, it may be heated. Withoutheating, curing takes about 24 hours at room temperature. Heating to 60Cin the alignment fixture permits effective curing to be achieved inabout 2 hours. This heating also decreases the viscosity of the epoxyeven further, enabling more effectively elimination of epoxy frombetween the electrical contacts, assuring absence of an insulatinglayer.

The top passivating layer for both the chip and the substrate carrier isgenerally amorphous SiO₂. The epoxy needs to wet this layer effectively,and thus the epoxy may be specially selected for this characteristic.Likewise, since it is not intended to maintain a layer between themetallic contacts, the epoxy may be selected to have a low wettabilityfor the metal contacts, especially when compressed during curing.

In the case of a removable adhesive, for example to permit rework or totest wafers before final assembly, various materials may be used toweaken or degrade the epoxy. The preferred method for removing afrangible epoxy is ACF-X remover (Anisotropic Conductive Film),available from Ito America Inc., www.itousa.com, which is also used forflip chip applications. It is also based on epoxy-like polymers. ACF-Xcauses epoxy to crack so that it can be removed mechanically. Thischemical worked on some other epoxies but not on Tra-Bond 2115, whichprovides a permanent bond.

When using the Tra-Bond 2115 epoxy, a 2 kg force was used for chips withIn—Sn bumps. There are ˜200 bumps, thus a pressure of about 10 grams perbump was applied. With gold studs, a force of 60 grams per contact wasemployed.

The process for forming the MCM is shown in FIGS. 2A-2C. An array ofmetallic bumps are first created on the chip contacts. (These bumps canbe prepared by prior art methods including In—Sn solder dipping and goldstud bonding.) Then, the chip carrier, shown in FIG. 1A, is coated witha nonconductive adhesive (with relatively low viscosity), the chip,shown in FIG. 1B, is carefully aligned with the carrier, and the two arecarefully pressed together in a way that squeezes the glue out of thecontact regions and compresses the bumps, without stressing or breakingthe chip. The assembly may be heated slightly to cure the adhesive, butthere is no need to melt the solder. The result is a package that isstrongly bonded in the non-contacting regions, and held by compressionin the contacts.

The adhesive is specially chosen for these purposes. The finalconnections must be clean metallic contacts, with very low contactresistance. Any significant insulating residue on the contacts woulddegrade the signal propagation. Further, the adhesive must be compatiblewith repeated cycling down between room temperature and cryogenictemperatures without cracking or affecting the contact resistance.

An SFQ racetrack similar to that described in Y. Hashimoto, S. Yorozu,and T. Miyazaki, “Transmission of single flux quantum betweensuperconductor chips,” AppL Phys. Lett., vol. 86, pp. 072502-1-072502-3(February 2005), was employed to test the performance of the adhesivebonded multichip module. With this technique, one monitors the averagevoltage while a definite number of flux quanta circumnavigates a loop.This is an excellent method of determining the maximum sustainable datarate in circuits with PTLs and chip-to-chip (C2C) bump connections. Atest chip was designed using a target critical current density of 4.5kA/cm², and increased the DFQ matching resistor and PTL impedance to 3Ω.The SCMs were assembled with adhesive mechanical bonds.

The racetrack experiment enables a specific number of flux quanta toenter the loop, and to remain circulating while the switch is on. Theracetrack speed can be varied by changing the bias of a variable delayline (VDL), which contains a 70-junction Josephson transmission line(JTL). The average voltage is nΦ₀/Δt, where Δt is the sum of the circuitdelay (mostly in the VDL), and the time to pass through the PTL and bumptransitions.

The circuit was simulated, and estimated as approximately 340 ps, or 6.1μV/Φ₀ at nominal bias. While the switch is off, there is no observedchange in the average voltage. When the switch is turned on, a rampedinput voltage is applied to a DC/SFQ converter. As each flux quantum ispopped into the loop, the average voltage increases by approximately 6μV, as expected. (The voltage to be measured is amplified by an IthacoModel 1201 lownoise preamplifier, Ithaco, Inc. PO Box 6437, Ithaca N.Y.14851-6437.)

Further increases in the number of flux quanta eventually results in amarked decrease in the step height, indicating a significant increase inthe bit error rate (BER). For the adhesive bonded multichip module, thelinearity holds up to ˜90 μV, corresponding to a data rate ofapproximately 43 Gbps.

A quantitative estimate of the bit error rate can be obtained byobserving how long the average voltage stays on the same voltage step. Avoltage of 72 μV could be sustained for more than 10 minutes, indicatingthat the BER is less than 5×10⁻¹⁴ at a data rate of 36 Gbps.

Initial results for an experiment using 30 μm solder bumps with signalbumps spaced 80 μm apart and five nearest-neighbor ground bumps show forn=20Φ₀ the maximum sustainable voltage was 119 μV, corresponding to amaximum data rate of 57.5 Gbps. The measured BER was less than 6×10⁻¹⁴at this data rate.

To increase data rates, bump geometries with more closely spaced 30 μmbumps may be used, for example. The chip-immersion bump-depositiontechnique often results in unacceptable bump-height variations.Therefore, other bumping methods, such as vacuum-deposited solder bumps,electrographic techniques, and gold stud bumps may be employed, thatwill assure better uniformity.

The adhesive bonding method for multichip modules may be used, forexample, to form a multichip implementation of a digital autocorrelationcircuit for a received radio frequency analog signal. For example, fouridentical chips, each with a 32-channel digital autocorrelation circuit,together with the front-end ADC chip, are mounted on a substrate forform a multichip module. Each of the devices are provided on a siliconwafer, which, for example, is patterned to provided Josephson junctioncircuits which are adapted to operate at <10K. All five chips would needto send weak SFQ pulses (˜1 mV, 2 ps) between them at a rate of 20Gbits/s or greater. This embodiment represents a 128-channel digitalspectrometer, but since the components are each simpler than anintegrated RF-input 128-bit autocorrelator, and the multichip modulefabrication technique provides high yield, and in some implementations,a capability for rework, the yield would be much higher than if theentire circuit needed to be on the same chip.

The present invention therefore provides a method for fabricating an MCMby providing a substrate having preformed electrical contacts, placing aliquid curable adhesive over the contacts, placing a chip havingcorresponding electrical contacts in alignment with the electricalcontacts of the substrate to form a liquid curable adhesive-filled gaptherebetween, compressing the chip and substrate to displace the liquidcurable adhesive between the contacts and form electrical pathways, andcuring the liquid curable adhesive to form a solid which maintains theelectrical pathways. The present invention further provides an MCM whichhas a substrate and at least one chip in electrical communicationtherewith through corresponding sets of predefined electrical contacts,wherein the corresponding sets of predefined electrical contacts are notthermally welded together, and are maintained in relative compression bya cured adhesive surrounding the sets of predefined electrical contacts,which preferably maintains its substantive mechanical characteristics atcryogenic temperatures.

REFERENCES

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1. A method for electrically interconnecting two substrates, each havinga corresponding set of preformed electrical contacts, at least one ofthe substrates comprising a functional superconducting electroniccircuit, comprising: providing a liquid curable adhesive over the set ofcontacts of a first substrate, wherein the liquid curable adhesivecomprises an adhesive which maintains mechanical integrity down tocryogenic temperatures, has a positive coefficient of thermal expansionwhen cured, and a viscosity at 20C of less than about 10,000 cp;aligning the set of electrical contacts of the second substrate with theset of electrical contacts of the first substrate; compressing the setsof electrical contacts of the first and second substrates to displacethe liquid curable adhesive and provide electrical communication betweenthe respective sets of electrical contacts; and curing the liquidcurable adhesive to form a stable solid matrix which maintains arelative compression, and electrical conductivity between, therespective sets of electrical contacts over at least a range oftemperatures between about +50C to −175C.
 2. The method according toclaim 1, wherein the liquid curable adhesive comprises an epoxyadhesive.
 3. The method according to claim 1, wherein the liquid curableadhesive is substantially unfilled.
 4. The method according to claim 1,wherein said compressing step comprises imposing a pressure of betweenabout 5-100 gm per contact pair.
 5. The method according to claim 1,wherein said compressing step comprises plastically deforming a metal oneach of the set of contacts of at least one of the first and secondsubstrate.
 6. The method according to claim 1, wherein the sets ofcontacts comprises at least 20 contacts each, and wherein each of thecontacts of the respective sets forms a conductive path between thefirst and second substrate.
 7. The method according to claim 1, furthercomprising the step of heating the liquid curable adhesive to atemperature of between about 40C and 100C during curing, wherein amaximum process temperature is less than about 120C.
 8. The methodaccording to claim 1, wherein the liquid curable adhesive shrinks duringcuring.
 9. The method according to claim 1, wherein the first and secondsubstrates have matched coefficients of thermal expansion, and the curedadhesive has a substantially mismatched coefficient of thermal expansionwith respect to the first and second substrates.
 10. The methodaccording to claim 1, wherein the liquid curable adhesive is removableafter curing.
 11. The method according to claim 1, wherein thefunctional superconducting electronic circuit comprises asuperconducting integrated circuit device.
 12. The method according toclaim 1, wherein the functional superconducting electronic circuitcomprises at least one rapid single flux quantum gate.
 13. The methodaccording to claim 1 wherein the two substrates are components of anelectronic multichip module having at least two electricallyinterconnected substrates, at least one of the substrates having adeformable metal in a contact region, said compressing comprisingcompressing the sets of electrical contacts of the first and secondsubstrates to deform the deformable metal and exclude liquid curableadhesive from an intercontact zone; further comprising operating asuperconducting device on at least one of the electricallyinterconnected substrates at cryogenic temperatures.
 14. The methodaccording to claim 1, wherein the compressed sets of electrical contactsare configured for electrically communication single-flux-quantum pulseshaving a data rate of at least 20 GHz.
 15. The method according to claim1, wherein the solid matrix maintains a relative compression andelectrical conductivity between the respective sets of electricalcontacts when subject to repeated thermal cycling between a temperatureless than −175C to a temperature of at least 20C and back again to lessthan −175C.
 16. The method according to claim 1, wherein at least oneset of preformed electrical contacts have a diameter of 30-100 μm and aheight of 10-70 μm.
 17. The method according to claim 1, wherein theelectrical contacts have a diameter of 30 μm and a relative spacing of80 μm.
 18. The method according to claim 1, wherein at least onesubstrate comprises a multichip module.
 19. The method according toclaim 1, wherein the adhesive is selected so as to wet silicon dioxide.20. The method according to claim 11, wherein the superconductingintegrated circuit comprises the metal niobium.
 21. The method accordingto claim 13, further comprising the step of heating the liquid curableadhesive to a temperature of less than about 100C during curing, whereina maximum process temperature is less than about 120C, wherein: theliquid curable adhesive comprises an epoxy adhesive which shrinks duringcuring, and has a positive coefficient of thermal expansion when cured,the first and second substrates have matched coefficients of thermalexpansion, and the cured adhesive has a substantially mismatchedcoefficient of thermal expansion with respect to the first and secondsubstrates, said compressing step comprises imposing a pressure ofbetween about 5-100 gm per contact pair, and the electronic circuitcomprises at least one rapid single flux quantum gate.
 22. The methodaccording to claim 14, wherein the compressed sets of contacts areconfigured for electrical communication of electrical pulsesrepresenting bits of a digital signal, having a bit error ratemaintained at a level less than 5×10⁻¹⁴.
 23. A method for electricallyinterconnecting two substrates, comprising: providing a first substrateand a second substrate each having preformed a set of exposed electricalcontacts; dispensing a liquid curable adhesive over at least one exposedsets of exposed electrical contacts, wherein the liquid curable adhesivecomprises an adhesive which maintains mechanical integrity down tocryogenic temperatures, has a positive coefficient of thermal expansionwhen cured, and a viscosity at 20C of less than about 10,000 cp;aligning the set of exposed electrical contacts of the second substratewith the set of exposed electrical contacts of the first substrate;compressing the sets of exposed electrical contacts of the first andsecond substrates, to displace the liquid curable adhesive fromlocations where the exposed sets of contacts of the first substrate andthe second substrate are aligned, to provide electrical communicationbetween the respective aligned sets of exposed electrical contacts; andcuring the liquid curable adhesive surrounding the aligned sets ofexposed electrical contacts to form a stable solid matrix whichmaintains a relative compression, and electrical conductivity between,the respective sets of electrical contacts over at least a range oftemperatures between about +50C to −175C, substantially without fusingthe aligned sets of exposed electrical contacts.
 24. The methodaccording to claim 23, wherein the adhesive is further selected so asnot to wet the electrical contacts.
 25. The method according to claim23, wherein the cryogenically stable liquid curable adhesive isdispensed in a layer less than about 100 microns thick, wherein theliquid curable adhesive is distributed over a bonding area encompassingthe at least one set of exposed electrical contacts without voids; andwherein the liquid curable adhesive is readily squeezed from anintercontact space between respectively aligned exposed contacts of thefirst and second substrates, substantially without redistributing forcesat contact points of respective exposed electrical contacts, saidcompressing being sufficient to plastically deform the respectivealigned sets of exposed electrical contacts.
 26. The method according toclaim 25, wherein the liquid curable adhesive comprises a substantiallyunfilled epoxy adhesive, which prior to curing has a viscosity at 20C ofless than about 1000 cp, wets silicon dioxide, and does not wet the setsof electrical contacts, and subsequent to curing, shrinks, has apositive coefficient of thermal expansion, and maintains mechanicalintegrity down to 9K, wherein said curing has a maximum processtemperature of less than 120C.